ASIC Digital Design, Sr Staff Engineer - 19064

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly experienced IC Design Engineer with a passion for pushing the boundaries of technology. With a PhD and over 10 years of practical analog IC design experience or an MSc with 12+ years, you possess extensive experience in FinFET technologies and a deep understanding of sub-circuits relevant to Memory, SerDes, and D2D. You are proficient in designing receive equalizers like CTLE, DFE, and FFE, and have expertise in DAC-based transmitters, ADC-based receivers, and DSP equalization. Your skills in high-speed clocking circuits such as PLL, VCO, ILO, DLL, and phase interpolator are exceptional. You are familiar with duty cycle correction, clock phase correction circuits, and digitally assisted analog calibration loops.

In-depth familiarity with transistor-level circuit design, sound CMOS design fundamentals, and experience with CMOS tape-outs are part of your skill set. You have a thorough knowledge of high-speed SerDes, Memory, D2D IO, and the associated circuit and fabrication issues that impact customer use-cases directly. ESD issues, custom digital design, and analog/digital interactions for optimizing circuit performance are well within your expertise. You are well-versed in design for reliability, layout effects, and the tools for schematic entry, physical layout, and design verification. Your proficiency with SPICE simulators and scripting languages like TCL, Perl, C, Python, and MATLAB is notable. Excellent communication, presentation, and documentation skills round out your profile.

What You’ll Be Doing:

• Reviewing UCIe and other D2D standards to develop novel transceiver architectures and sub-block specifications.
• Investigating and developing circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets.
• Collaborating across geography, project, and department teams to streamline design and verification strategies, ensuring overall design quality, efficiency, and performance.
• Overseeing PHY level physical layout to minimize the effect of parasitics, device stress, and process variation.
• Presenting and reviewing simulation data from internal project teams, and presenting results externally at industry panels or customer reviews.
• Documenting design features and test plans, consulting on the overall electrical characterization of the D2D IP product, analyzing customer silicon data for design enhancements, and proposing solutions for post-silicon design updates.