Design Engineer, Microelectronics Packaging
- Compensation
- Not disclosed
- Location
- Tokyo, JP
- Work setup
- Hybrid
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- Not specified
- Category
- Engineering design
- Posted
Skills
Must have
- Master's or PhD in experimental physics, electrical engineering, or a related technical field
- Experience with heterogeneous 3D integration technologies, such as bump bonding or RDL fan-out
- Working knowledge of standard CAD tools used in package design
- Understanding of DC, thermal, and/or microwave characterization techniques
- Familiarity with cryogenic measurement techniques
- Comfortable working independently, and just as comfortable coordinating across IQM's European teams and external partners
- Strong documentation skills, and fluent spoken and written English and Japanese
- Willingness to travel
Full description
At IQM, we build world-leading quantum computers for the well-being of humankind. We design systems to tackle computational challenges beyond the practical limits of classical machines. Our work sits at the edge of science and engineering. It's complex, demanding, and deeply collaborative. We turn deep research into reliable, full-stack systems that drive discoveries in fields like medicine, energy, and technology, reshaping how the world computes.
Join the team that gives quantum a heartbeat.
The work
In this role, you will develop the 3D integrated stack that gives our QPUs clean, high-quality microwave and DC connectivity, built to survive and perform at cryogenic temperatures. You will work as part of our Emerging Technologies team, based at our Japan site. Your work sits right at the intersection of IQM's own development teams in Europe and our Japanese partners, helping define the packaging solutions that will let future generations of QPUs scale.
What you’ll actually do
- Develop functionalities and features of the 3D integrated stack for high-quality microwave and DC connectivity under cryogenic operation
- Define stack and process requirements together with internal teams and external fabrication partners, covering PCB, ceramic, glass, or silicon-based processes
- Develop, optimize, and characterize die packaging processes for chips built to operate in cryogenic environments
- Plan and implement testing and validation procedures, both at IQM and together with our Japanese partners
- Act as the technical link between IQM and our partners, balancing QPU package requirements with what is realistically achievable on their end
- Contribute to planning test strategies, mapping out what capabilities are available at IQM and at partner sites
- Get hands on with testing: electrical and thermal characterization of stack features
- Document your work clearly, so findings are easy to pick up by teammates and partners across time zones
- Work independently day to day, while staying closely connected to IQM's development teams in Europe
What we’re looking for
- Master's or PhD in experimental physics, electrical engineering, or a related technical field
- Experience with heterogeneous 3D integration technologies, such as bump bonding or RDL fan-out
- Working knowledge of standard CAD tools used in package design
- Understanding of DC, thermal, and/or microwave characterization techniques
- Familiarity with cryogenic measurement techniques
- Comfortable working independently, and just as comfortable coordinating across IQM's European teams and external partners