Data Edge
Embedded Engineer
Senior Embedded Engineer (semiconductor focus) joining a partner's engineering team to architect high-volume, cost-sensitive ASIC/SoC products: defining architecture, selecting third-party IP and process nodes, driving DfC/DfM/DfA/DfY, and working with foundries, OSATs and manufacturing partners through tape-out, bring-up, production and yield optimization. Regular travel to Denmark required.
- Compensation
- Not disclosed
- Location
- Bucharest, Romania
- Work setup
- Remote
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- 8+ years
- Category
- Embedded
- Posted
Skills
Must have
- 8+ years of relevant experience in ASIC microarchitecture, ASIC design, SoC design, embedded semiconductor development, or a closely related electrical engineering discipline
- Track record of taking ASIC/SoC products through the complete development lifecycle, including multiple successful tape-outs
- Strong understanding of ASIC/SoC architecture and microarchitecture, with ability to evaluate system-level trade-offs
- Hands-on experience evaluating, selecting, and integrating third-party semiconductor IP
- Understanding of how IP selection and integration influence system architecture, performance, cost, and risk
- Good knowledge of semiconductor foundry processes, process nodes, and PDKs
- Practical experience with advanced semiconductor packaging and assembly strategies
- Strong understanding of semiconductor testing methodologies (test strategies, fault coverage, test time, production-test cost)
- Solid understanding of semiconductor yield fundamentals (die-size/yield relationships, production-line yield analysis, silicon test data)
- Practical experience applying DfC, DfM, DfA, and DfY principles
- Good understanding of wafer economics, OSAT operations, packaging costs, test costs, and semiconductor unit-cost drivers
- Willingness to travel internationally, including regular travel to Denmark several times per month and periodic travel to Boston, Europe, and Asia
Full description
Senior Embedded Engineer
We are looking for a highly experienced Senior Embedded Engineer to join our partner's engineering team and play a key role in the architecture, development and production of high-volume, cost-sensitive microelectronic products.
Key Responsibilities:
- Collaborate closely with Electrical Engineering teams to define product requirements, system specifications, and ASIC/SoC architectures for high-volume, cost-constrained microelectronic applications.
- Evaluate system-level architectural options and drive technical trade-offs between performance, power, die size, cost, manufacturability, yield, and time-to-market.
- Lead the technical evaluation, selection, and integration of third-party semiconductor IP, including analog, compute, memory, connectivity, and other relevant IP blocks.
- Represent the engineering organization in technical discussions with foundries, OSATs, semiconductor IP providers, and manufacturing partners.
- Support technology roadmap discussions and proactively identify manufacturing, technology, and supply-chain risks.
- Provide technical input into process-node and PDK selection, considering performance requirements, power consumption, cost, yield, foundry maturity, and production readiness.
- Drive Design-for-Cost (DfC), Design-for-Manufacturing (DfM), Design-for-Assembly (DfA), and Design-for-Yield (DfY) principles from architecture through production.
- Guide decisions related to floorplanning, die size, pin count, pin placement, package selection, and assembly strategy, optimizing both technical and commercial outcomes.
- Develop and contribute to semiconductor cost models covering wafer economics, packaging, OSAT costs, testing, yield, logistics, and other unit-cost drivers.
- Work closely with test and validation teams to define production-test strategies that maximize fault coverage while minimizing test time and cost.
- Analyze silicon test results, production data, and yield metrics to identify opportunities for design, manufacturing, and cost optimization.
- Support root-cause analysis of silicon, manufacturing, and yield issues and drive corrective actions with internal and external stakeholders.
- Incorporate supply-chain resilience and multi-sourcing considerations into architectural and technology decisions.
- Evaluate the impact of die size, process-node selection, foundry maturity, packaging, and manufacturing choices on sourcing flexibility and supply-chain risk.
- Collaborate with cross-functional teams throughout the complete ASIC/SoC lifecycle, from architecture and technology selection to design, tape-out, silicon bring-up, validation, production, and yield optimization.