Founding AI Accelerator Architect (Research & Hardware Co-Design)
- Compensation
- Not disclosed
- Location
- GB
- Work setup
- Onsite
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- Not specified
- Category
- Hardware
- Posted
Skills
Must have
- A strong research or engineering background in computer architecture, digital hardware, AI accelerators, or hardware–software co-design.
- Ideally a PhD or equivalent research experience in computer engineering, electrical engineering, computer science, or a related field.
- Experience designing, implementing, or evaluating hardware accelerators for neural networks or other computationally intensive workloads.
- A deep understanding of digital architecture, including datapaths, pipelining, parallelism, memory systems, and data movement.
- Familiarity with RTL design and verification.
- The ability to take an open-ended research problem, develop a hypothesis, build a prototype, and evaluate it quantitatively.
- Strong programming skills and comfort working across software, architecture, and hardware.
- The curiosity to challenge established approaches and the engineering discipline to distinguish promising ideas from impractical ones.
- Comfort using AI tools to accelerate research, development, and experimentation.
Full description
What you'll own
- Research and develop novel accelerator architectures for LLM inference, focusing on binary and ternary weights, model-specific computation, and efficient data movement.
- Explore how model weights and operations can be encoded directly into silicon, and how much hardware can be reused across different models.
- Investigate trade-offs across model quality, inference latency, throughput, silicon area, and power consumption.
- Design and evaluate compute architectures, memory hierarchies, attention mechanisms, KV-cache systems, and low-precision arithmetic.
- Explore automated approaches to translating model architectures and trained weights into efficient hardware, including compiler-driven RTL generation.
- Build architectural simulators, performance models, and FPGA prototypes to validate ideas before committing to silicon.
- Work closely with our founders and ASIC engineers to turn promising research into implementable microarchitectures.
- Help define the longer-term technical direction of Lamb Labs' inference hardware.
What we're looking for
- A strong research or engineering background in computer architecture, digital hardware, AI accelerators, or hardware–software co-design.
- Ideally a PhD or equivalent research experience in computer engineering, electrical engineering, computer science, or a related field.
- Experience designing, implementing, or evaluating hardware accelerators for neural networks or other computationally intensive workloads.
- A deep understanding of digital architecture, including datapaths, pipelining, parallelism, memory systems, and data movement.
- Familiarity with RTL design and verification.
- The ability to take an open-ended research problem, develop a hypothesis, build a prototype, and evaluate it quantitatively.
- Strong programming skills and comfort working across software, architecture, and hardware.
- The curiosity to challenge established approaches and the engineering discipline to distinguish promising ideas from impractical ones.
- Comfort using AI tools to accelerate research, development, and experimentation.
Especially useful experience
Research or practical work involving:
- LLM or transformer accelerators, including attention and KV-cache optimisation.
- Binary, ternary, or other low-precision neural networks.
- Model compression, quantisation, sparsity, or inference optimisation.