FPGA RTL Designer

Responsibilities

• 6+years of relevant experience in FPGA design

• Currently the products we are building use QKD and QRNG technologies. They are the first of their kind in India.

• Product that we are building using QKD technology is called QNL-X100. They use high speed electronics and quantum optics.

• We ensure Hack-Proof Communications through Quantum Technologies. Come, be a part of something unique and leave your mark on the future!

Primary Role/Scope of Job:

• Perform high speed FPGAdigital design using VHDL and Verilog for complex mathematical and control logic algorithms.

• Develop micro architecture documents, participate in micro architecture reviews and complete the RTL design, verification, synthesis and timing verification closure.

• Generating the component requirements and specifications. Defining top-level architecture as well as micro architecture for detailed implementation.

• Defining verification methodology

• Building a VIP test bench for self-checking verification.

• Modelling of IP to verify RTL functionality vs. requirements.

• Performing detailed synthesis, timing analysis, and analysis of system level functionality.

• Contributing to internal design reviews to ensure adherence to the company ASIC and FPGA design

• Support lab evaluations and debug activities with ILA and VIO including board level using Logic Analyzers, oscilloscopes, etc.

• Work with hardwareand software team to implement changes required by the driver.

• Modify thedesign for future features in the FPGA.

• Understand over-all chip power save modes and external system requirement.

• Evaluate system-level performance in simulation, in FPGA emulation platform.

Experience and Expertise Required:

• Has knowledge of Xilinx FPGA implementation and tools.

• Knowledge on state of the art tools and flows.

• Micro level FPGA Design for meeting the requirements

• Sound knowledge improving and resolving timing issues.

• Sound Knowledge of logic design and RTL implementation

• Board level testing to validate RTL design

• Creation of Requirement and Design Documentation

• Experienced with VHDL(desirable) and Verilog

• Active participation in internal Design Reviews (desirable)

• Hand-on in protocols such as Ethernet- 100/1000 Mbps,PCIeGen3, SPI, UART,I2Cetc

• Hand on In Cryptographic algorithms and its usage. Job Requirements

• Knowledge of ASIC and/or FPGA design methodology and should be well versed in front end design, simulation, and verification CAD tools.

• Knowledge on relevant FPGA/ASIC engineering design and verification experience.

• Excellent verbal, written and communication skills are required.

• Excellent follow-through, motivation, and persistence

• Strong technical judgment and decision making abilities.

• Knowledge of digital board design and signal integrity principles is a plus

• Training interns and fresher as a part of team building