Hardware Reliability Engineering Manager
Leads a team of hardware reliability engineers at Google, owning the reliability strategy for consumer-electronics hardware across its full lifecycle (concept, qualification, production, field). Sets test and qualification methods, drives DFMEA/reliability modeling and FRACAS failure analysis to root cause, and reports risk to leadership.
- Compensation
- $188K–$274K / yr
- Location
- Sunnyvale, CA, USA; Austin, TX, USA
- Work setup
- Not specified
- Seniority
- Not specified
- Employment
- Contract
- Experience
- 4+ years
- Category
- Hardware
- Posted
Skills
Must have
- Bachelor's degree in Hardware Engineering or equivalent practical experience
- 8 years of experience applying Design for Reliability techniques on multiple consumer electronics products
- 4 years of experience managing a technical team
Nice to have
- Master's degree or PhD in Hardware Engineering
- 7 years of experience with experimental design and execution of complex hardware products
- 6 years of experience in statistical analysis
- 6 years of experience working with manufacturing partners
- 5 years of experience with failure analysis techniques
- Experience running FRACAS and failure review boards, driving hardware failures to root cause and corrective action
Full description
As a Reliability Engineer, you will play a key role in creating new consumer electronic products that meet a high bar for reliability and performance. You will work closely with the product management and design engineering teams to define standards, specify tests, and then supervise test execution and failure analysis. A broad engineering background and command of statistical methods will help to inform design of new products. Your strong interpersonal and communication skills will be key to ensuring adoption of your technical recommendations.
As a Hardware Reliability Engineering Manager, you will lead a team of system reliability engineers and own the reliability strategy for the hardware across its full life cycle: concept, qualification, production and field. You will grow and develop engineers, set the team's technical direction, and decide where effort goes based on program phase and risk. You will establish the test methods and qualification processes the team uses, provide reliability predictions for new and deployed products, and run failure review and corrective action through to closure. You will partner with hardware engineering, validation, manufacturing, operations, ODM/Contract Manufacturer partners and third-party labs, and you will communicate reliability status, risk and trade-offs to engineering and operations leadership.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $188000 - $274000 (USD) + 20% bonus target + equity + benefits
Learn more about benefits at Google.
- Grow, lead and develop a team of system hardware reliability engineers across sites, including work assignments and performance reviews.
- Own reliability strategy for new products from concept through field: set goals and plans, and secure the samples, test capacity and budget to execute them.
- Set the test methods, qualification processes and reference test plans used across programs.