Hardware/ Software Co-Design Engineer
Designs low-power digital processors and hardware accelerators for brain-computer interfaces, implementing RTL and collaborating with firmware teams using SystemVerilog, C/C++, and Python.
- Compensation
- $151K–$261K
- Location
- Austin, Texas, United States; South San Francisco, California, United States
- Work setup
- Not specified
- Seniority
- Not specified
- Employment
- Contract
- Experience
- Not specified
- Category
- Hardware
- Posted
Skills
Must have
- Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
- Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
- Experience designing and implementing embedded software in C or Rust
- Expertise in SystemVerilog, C/C++, Python
- Experience designing and implementing emulation models, transactors, and test environments to replicate hardware behavior
- Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
- Experience in designing digital signal processing pipelines, from algorithm to RTL
Nice to have
- Experience in architecture optimization with process technology customization
- Experience in the verification of complex digital systems, using industry standard tools
- Experience in the physical design of complex digital systems, using industry standard tools
- Experience testing and debugging digital system-on-a-chips
- Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
- Experience automating tool flows
- Experience in processor instruction set architecture design
- Experience in compiler back-end design and customization
Full description
About Neuralink:
We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.
Team Description:
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description & Responsibilities:
Our Hardware/ Software Co-Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.
- Micro-architecture design and RTL implementation of:
- Low-power digital signal processors
- Low-power general-purpose hardware accelerators
- Low-power graphics processing units
- Low-power radio MAC/PHY
- Low-power serial link MAC/PHY
- Design and optimization of hardware/software interface with firmware engineers
- Application-specific architecture optimization including:
- Complex system modeling for energy and performance benchmarks
- Workload analysis and modeling
- Energy/performance profiling and analysis
- Leveraging architecture-level design trade-offs with process technology and workload type
- Balancing cost and performance under manufacturing process variation
- Collaboration on silicon bring-up tests with verification engineers
Required Qualifications:
- Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
- Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
- Experience designing and implementing embedded software in C or Rust
- Expertise in SystemVerilog, C/C++, Python