Integrated Circuit Design Verification Engineer
- Compensation
- Not disclosed
- Location
- Vancouver, WA - 805 Broadway
- Work setup
- Not specified
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- Not specified
- Category
- Design
- Posted
Skills
Must have
- BSEE or MSEE or relevant years of experience
Nice to have
- Experience with entire verification process from planning to sign-off
- Experience with Siemens’ UVM Framework
- Experience in emulation
- Experience in RTL design
- Familiarity with video and display systems, MIPI, AMBA, I2C, SPI protocols and embedded microcontroller
- Familiarity with ASIC test or production flow
- Ideal candidate is a self-starter, can organise complex issues and drive them to closure
- Able to multitask and prioritise.
Full description
Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together.
The Company operates Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world, and Specs Inc., a wholly-owned subsidiary dedicated to making computing more human, in addition to Bitmoji, Saturn, and other digital services.
Specs Inc. is a wholly-owned subsidiary of Snap Inc. dedicated to making computing more human. The company develops Specs, advanced eyewear that seamlessly integrates digital experiences into the physical world.
Specs feature see-through lenses that place digital objects directly into three-dimensional space, powered by Snap OS, a proprietary, context-aware operating system designed for natural interaction with your hands and voice.
Specs Inc. also provides Lens Studio, a full suite of advanced developer tools that powers immersive augmented reality experiences across Specs, Snapchat, and other services.
We’re looking for a Integrated Circuit Design Verification Engineer to join the Spectacles Team at Snap Inc!
What you’ll do:
- Work as part of a multi-disciplinary team designing display Integrated Circuits for AR
- Work closely with digital design, analog logic, software and verification engineers
- Develop and implement UVM-based and assertion-based testbenches
- Create and execute verification test plans, including functional coverage and code coverage
- Utilize Siemens Questa tool set for verification and debug tasks
- Specify and configure tools and create automation
Knowledge, Skills & Abilities:
- Strong knowledge of UVM and SystemVerilog for advanced verification methodologies
- Strong knowledge of digital functional simulation, and tools such as Siemens Questa
- Strong knowledge of good Verilog RTL coding practices
- Scripting and automation, such as TCL, Make, Perl, Python and Shell scripts in Linux environment
- Excellent written and verbal English communication
Minimum Qualifications:
- BSEE or MSEE or relevant years of experience
- 10+ years of experience in ASIC Design Verification
Preferred Qualifications:
- Experience with entire verification process from planning to sign-off