Lead Application Engineer
- Compensation
- Not disclosed
- Location
- FELDKIRCHEN (Munich)
- Work setup
- Not specified
- Seniority
- Lead
- Employment
- Not specified
- Experience
- Not specified
- Category
- Industrial engineering
- Posted
Skills
Must have
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or related fields.
- Experience in IC Package design using APD and knowledge in available package technologies. Experience in Signal Integrity and Power Integrity (SI/PI) on IC Package and PCB level would be beneficial.
- Strong analytical, debugging, and problem-solving skills.
- Strong english written, verbal and presentation skills.
- Drive to continuously learn about IC Package technologies and analysis to support customers on leading edge design challenges
- Ability to establish a close working relationship with both customer and internal stakeholders. Mentorship expertise is nice to have.
- A valid work- and residence permit
Full description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We offer amazing opportunities to grow, no matter where you are in your career.
Cadence Design Systems Inc. is looking for a motivated Lead Application Engineer: IC Packaging Design & Analysis to work with us in Munich, Germany or optional any other Cadence site in Europe.
At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Germany and other European countries and is also a Fortune 100 Best Companies to Work For.
As an Application Engineer, you will be part of the Customer Success Team (CST) organisation and specifically in the System Design and Analysis (SDA) team in Munich, Germany or another Cadence site in Europe. In this role in the SDA team you’ll work with Allegro X Advanced Package Designer (APD) and system level analysis tools from the Sigrity platform. You’ll work with customers designing leading edge advanced packages using Cadence tools and flows for Chip – Package – PCB co-design.
To understand more on our tools & flows, you can visit Allegro X Advanced Package and Sigrity-X Platform
Job Responsibilities
- Support customers in the deployment and adoption of Cadence IC Packaging design and analysis solutions; Assist customers in debugging and optimizing designs involving System Design, Board, Package, Heterogenous integrated 2.5/3D-IC designs, High-Speed Interfaces technologies, using either tool capabilities, scripting techniques or new methodologies.
- Drive methodology and solution-oriented discussions with key stakeholders. Educate and drive adoption of new technology across customers.
- Train and ramp-up new customers designing IC Packages with Cadence IC Packaging tools and solutions.
- Collaborate with R&D, field teams, and product specialists to reproduce issues, test solutions, and improve tool usability.
- Develop technical documentation, examples, and knowledge content to improve customer self-service and tool adoption. Document findings, methodologies, and best practices to improve customer self-service and internal knowledge sharing.
- Build relation with worldwide teams to collaborate on needs. Mentor junior engineers and contribute to the development of technical expertise within the team.
Requirements:
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or related fields.
- Experience in IC Package design using APD and knowledge in available package technologies. Experience in Signal Integrity and Power Integrity (SI/PI) on IC Package and PCB level would be beneficial.
- Strong analytical, debugging, and problem-solving skills.