MediaTek
Mixed-Signal Digital IC Design Engineer(Serdes, High Speed Interface)
- Compensation
- Not disclosed
- Location
- HsinChu
- Work setup
- Not specified
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- Not specified
- Category
- Hardware
- Posted
Skills
Full description
- Serdes/High speed interface related PHYD IP architecture planning
- Serdes/High speed interface related PHYD IP RTL coding
- Serdes/High speed interface related PHYD IP front-end and back-end integration
- Co-work with MAC design team and DV team for IP verification
- Co-work with Analog design team for PHY co-simulation
#LI-DC3
- Good at RTL and digital circuit design
- Familiar with front-end or back-end integration flow and related EDA tools
- Knowledge of high speed interface standards such as Ethernet Serdes, PCIe, USB, HDMI, DP, MPHY, CPHY etc.
- Experience in high speed Interface PHYD IP development
- Experience in DSP based IP design, such as CDR, CTLE, FEC, FFE, FIR, IIR etc.