Physical Design Methodology Engineer, AI HW IP
Build and own RTL-to-GDSII flows for AI accelerators and CPUs, automating PPA exploration and signoff to speed IP delivery across nodes and variants.
- Compensation
- $100K–$500K / yr
- Location
- Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada
- Work setup
- Not specified
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- 5+ years
- Category
- Design
- Posted
Skills
Must have
- A physical design or CAD methodology engineer who has built flows that production teams depend on daily.
- Automation-minded, happiest when you are removing manual steps and making PPA exploration repeatable.
- Building with AI as part of how you develop flows, and opinionated about where LLMs and ML-driven optimization genuinely help versus where they do not.
- An effective partner to design teams and EDA vendors, and a clear writer who documents flows well enough that others can run them without you.
Full description
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Our IP delivery timelines are set as much by flow maturity as by design work. This role develops, deploys, and owns the RTL-to-GDSII methodology the IP physical design team runs on, so a new block, node, or customer variant starts from a working flow instead of a cold start.
This role ishybrid, based out of Toronto, ON; Austin, TX, or Belgrade, Serbia.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- A physical design or CAD methodology engineer who has built flows that production teams depend on daily.
- Automation-minded, happiest when you are removing manual steps and making PPA exploration repeatable.
- Building with AI as part of how you develop flows, and opinionated about where LLMs and ML-driven optimization genuinely help versus where they do not.
- An effective partner to design teams and EDA vendors, and a clear writer who documents flows well enough that others can run them without you.
What We Need
- An Engineer with 5+ years developing and supporting physical design methodology or CAD flows in production use.
- Expertise with industry-standard tools (FusionCompiler/ICC2, Innovus/Genus, PrimeTime, RedHawk) and scripting languages (Tcl, Python, Perl).
- Deep understanding of advanced node methodology, low-power intent (UPF/CPF), clock tree synthesis, and signoff (EM/IR, DRC/LVS).
- Experience standing up flows for new technology nodes, PDKs, or foundry targets ahead of program need, and qualifying new EDA releases.
What You Will Learn
- How to build and scale EDA automation for AI accelerators and high-performance CPUs on advanced FinFET/GAA nodes.
- ML-driven flow optimization and custom CAD development at production scale.
- How to influence EDA vendor roadmaps through direct technical partnership.