Principal Engineer Digital Design (f/m/div)

#WeAreIn for jobs that impact everyone's life.
What if your ideas could change the way the world connects, powers up, or thinks?
As a Principal Engineer Digital Design on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

Are you in?

Your role
Key responsibilities in your new role

• Architectural and concept development, design, code in RTL, synthesize and integrate complex digital and mixed-signal blocks for automotive microcontroller IPs, with focus on system resources IPs like clocking and reset
• Conducting analysis of digital blocks performance in corner cases
• Own microarchitecture design, specification and maintenance
• Perform static timing analysis, and power/area / performance optimization, collaborating closely with the physical design team
• Work with verification teams to ensure block-level and system-level verification, addressing any issues identified
• Ensure designs comply with ISO 26262 and other automotive safety standards, implementing safety mechanisms as required
• Proactively identify and resolve technical risks and issues related to design, timing, or functionality
• Drive the development of scalable, reusable IPs to meet platform and project needs
• Lead a design team and collaborate with cross-functional teams, including system architects, software engineers, and validation teams, to ensure seamless product integration

Your profile
Qualifications and skills to help you succeed

• A degree (Bachelor/Master) in Electrical Engineering, Computer Engineering, or related field
• 8+ years of experience in digital design, with a focus on automotive, safety-critical systems, and power management systems
• Expertise in RTL coding using System Verilog, Verilog and VHDL
• Expertise in low-power design techniques, implemented as multi-power-, multi-clock, and multi-reset domain design
• Knowledge of synthesis, STA (static timing analysis), and power/performance / area trade-offs
• Experience with debug tools and familiarity with simulation/emulation methodologies
• Knowledge of automotive safety standards (ISO 26262) and experience implementing safety mechanisms are a plus
• Strong problem-solving skills and ability to work alone or in a team on complex tasks
• Excellent communication skills, with experience collaborating across teams
• Proficiency in English as an advantage
• Familiarity with infrastructure IPs of microcontrollers (power control, on-chip system monitoring and alarming…) and system-level design requirements
• Experience with DFT (Design for Testability)

Additional information by location

Austria

We offer competitive salaries and additional benefits based on your performance, experience, and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group I (). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.

#WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in?

We are on a journey to create the best Infineon for everyone.

We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply.

Please let your recruiter know if you need any accommodations during the interview process.

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