Principal PIC (Photonic Integrated Circuit) Design Engineer
- Compensation
- $200K–$280K / yr
- Location
- New York Office (HQ)
- Work setup
- Onsite
- Seniority
- Principal
- Employment
- Not specified
- Experience
- 5+ years
- Category
- Engineering design
- Posted
Skills
Must have
- Ph.D. in Electrical Engineering, Applied Physics, Photonics, or a related field with 5+ years of relevant industry experience.
- 7+ years of hands-on experience in silicon photonic integrated circuit (PIC) design, including electromagnetic simulation, active and passive component optimization, and top-level chip layout/floorpla
- Proven track record of taking complex silicon photonics designs through full foundry tapeouts (DRC/LVS) and successful silicon validation/characterization.
- Deep expertise in photonic device physics, optical waveguide theory, silicon and silicon nitride fabrication processes, and design-for-manufacturability (DFM) principles.
- Proficiency with industry-standard simulation and layout tools (e.g., Ansys Lumerical, Tidy3D, COMSOL, KLayout, and gdsfactory).
- Experience with optical characterization techniques, data analysis in Python or MATLAB, and translating lab measurements into PDK and circuit design updates.
- Strong technical leadership capability, excellent communication skills, and a demonstrated ability to collaborate across multidisciplinary teams (packaging, EIC, systems, and test).
Nice to have
- Proven track record designing advanced silicon photonic switches, high-speed optical phase shifters, or ultra-low-loss passive components (e.g., MMIs, mode converters, polarization splitters/rotators)
- Hands-on experience with silicon nitride (SiN) integration, multi-layer photonic routing architectures, or heterogeneous integration (e.g., III-V on silicon, thin-film lithium niobate).
- Deep domain expertise in wideband photonic device performance spanning both C-band and O-band telecom/datacom wavelengths.
- Strong scripting and automation capabilities in Python or MATLAB for component layout generation, automated simulation sweeps, and high-volume data analysis.
- Experience with automated wafer-level testing setups, process variation extraction, and statistical yield modeling for PIC commercialization.
Full description
Principal PIC (Photonic Integrated Circuit) Design EngineerAbout us:
Voyant Photonics builds silicon photonic chips that steer and switch light at high speed. They power next generation, chip-scale FMCW LiDAR for robotics and autonomy, and optical circuit switches (OCS) for AI data centers. Based in NYC, we’re a hands-on team designing, building, and deploying frontier hardware to solve problems that matter, from how machines see to how AI scales.
Why Join Us?
At Voyant, you'll help develop some of the most sophisticated silicon photonic chips, spanning two exciting applications: optical circuit switching for AI data centers and chip-scale LiDAR sensing.
You'll tackle engineering challenges at the intersection of photonic device physics, large-scale circuit integration, and semiconductor manufacturing, developing high-performance photonic components that enable PICs with hundreds to thousands of integrated optical devices.
As a Principal PIC Design Engineer, you'll take ownership of large scale photonic chip development from concept and simulation to layout, tapeout, and characterization. You'll have the opportunity to architect complex photonic integrated systems, define chip-level specifications and trade-offs, and work closely with a multidisciplinary team in a fast-paced startup environment.
The Role:
- Lead system-level architecture and design of large-scale silicon photonic integrated circuits (PICs), integrating hundreds to thousands of active and passive photonic devices.
- Define chip-level optical architectures, link budgets, and performance trade-offs across insertion loss, crosstalk, bandwidth, power consumption, and thermal management.
- Drive top-level chip integration, floorplanning, optical routing, and design-for-manufacturability (DFM) strategies for high-yield silicon photonics tapeouts.
- Contribute to photonic component library development
- Serve as top-level tapeout owner, managing design verification (DRC/LVS) and foundry tapeout execution
- Provide technical leadership across multidisciplinary teams, collaborating closely with component designers, packaging engineers, electronic IC (EIC) designers, and system software engineers.
- Guide wafer- and chip-level characterization strategies to evaluate full PIC performance against system-level requirements and drive iterative design updates.
- Establish and maintain technical relationships with foundry partners to evaluate next-generation process design kits (PDKs) and platform capabilities.
What We're Looking For
- Ph.D. in Electrical Engineering, Applied Physics, Photonics, or a related field with 5+ years of relevant industry experience.