Principle Validation and Hardware Design Engineer
- Compensation
- Not disclosed
- Location
- Santa Clara, CA
- Work setup
- Not specified
- Seniority
- Intern
- Employment
- Internship
- Experience
- 3+ years
- Category
- Hardware
- Posted
Skills
Must have
- Bachelor of Electrical Engineering with 8+ years or more of relevant work experience, or Ph.D. in Electrical Engineering with 5+ years or more of relevant work experience.
- Technical silicon validation experience, preferably in the area of SERDES and high-speed interface design, and experience in system marginality validation.
- A minimum of 3 years of experience as a project lead.
- Experience in software programming languages development with focus on Python to develop test scripts. Knowledge of mathematical programming such as Matlab is a plus.
- Skilled in reviewing PCB schematics and able to debug PCBs is a major plus.
- Knowledge of wireline communication theory and physical layer specifications such as IEEE 802.3 and Common Electrical Interface is a major plus.
- Knowledge of high-speed I/O, Transceiver, Transmitter, or Receiver is a major plus.
- Detailed, working knowledge of lab equipment (Oscilloscopes, Function Generators, Spectrum Analyzers, BERTs, etc.) and solid lab techniques.
- Good personal communication skills and a team-working spirit. Hardworking and motivated to be part of a highly competent team.
- Proven leadership, excellent problem-solving skills, and continuous learning and improvement.
- Strong communication, collaboration, and teamwork skills and the ability to work in a global team environment.
- Strong verbal and written communication skills in English.
Full description
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell, a high-speed analog/mixed-signal semiconductor company, is the market leader in high-speed and optical interconnects for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data center from 10Gig to multi-hundred-Gig (> 100G) network environments. By leveraging our core competencies in advanced analog circuit design, advanced DSP (Digital Signal Processing), packaging and process technologies, Marvell has taken a leadership role in the markets we serve.
The ODSP team within Marvell’s Connectivity Business Group develops advanced products supporting industry leading solutions for the growing datacenter, enterprise, optics, and AI application. As part of the ODSP validation team, you will be working and bringing our cutting-edge products to the market and enable all HyperScaler to scale-up and scale-out.
What You Can Expect
- Lead the generation, review, and refinement of bring-up and validation plans for Marvell’s products.
- Create and review tests plans and prepare test result documents to be shared internally.
- Work with Design, FW, and Validation teams to debug any issues found and find root cause on bugs.
- Guide teams and professional individuals within the Validation team.
- Execute validation plans and contribute to the development of validation strategies through independent decision-making.
- Work closely with direct reports, chip designers, and system engineers to validate and identify bugs in the Marvell’s products rigorously.
- Foster a culture of innovation and accountability through strong leadership.
- Interact with validation and other functional teams in the U.S. and other locations, ensuring effective communication and collaboration.
What We're Looking For
- Bachelor of Electrical Engineering with 8+ years or more of relevant work experience, or Ph.D. in Electrical Engineering with 5+ years or more of relevant work experience.
- Technical silicon validation experience, preferably in the area of SERDES and high-speed interface design, and experience in system marginality validation.
- A minimum of 3 years of experience as a project lead.