RTL Design Engineer

We are seeking a skilled RTL Design Engineer to join our dynamic team in Karnataka. The ideal candidate will have a strong background in RTL design and a passion for developing innovative solutions in the field of digital design. As an RTL Design Engineer, you will be responsible for designing, implementing, and verifying complex digital systems, including IP subsystems and SoCs.

Key Responsibilities:

• Develop RTL designs using Verilog and SystemVerilog for various digital components.
• Collaborate with cross-functional teams to define specifications and requirements for IP subsystem design.
• Perform RTL debugging and verification to ensure high-quality deliverables.
• Integrate IP blocks and ensure compliance with AXI protocol and interconnect standards.
• Work on ARM CPU subsystem designs and contribute to the overall architecture of SoCs.
• Participate in design reviews and provide constructive feedback to peers.
• Stay updated with the latest trends and technologies in ASIC design and RTL methodologies.

Required Skills:

• Proficiency in RTL design using Verilog and SystemVerilog.
• Experience with IP subsystem design and SoC design methodologies.
• Familiarity with ARM CPU architecture and AXI protocol.
• Strong debugging skills in RTL and experience with IP integration.
• Knowledge of ASIC design flow and tools.

If you are a motivated engineer looking to make an impact in the field of digital design, we encourage you to apply and join our innovative team.