Semicon Etch Process Engineer
- Compensation
- Not disclosed
- Location
- Singapore
- Work setup
- Not specified
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- 3+ years
- Category
- Industrial engineering
- Posted
Skills
Must have
- Bachelor's degree or higher in Engineering or Science (e.g., Materials Science, Chemistry, Chemical Engineering, Electronics, Advanced Materials)
- Minimum 3 years of hands-on experience in plating, etching, or stripping processes in semiconductor manufacturing
- Fundamental understanding of advanced semiconductor fabrication and integration processes
- Strong skills in experiment design, statistical data analysis (e.g., SPC, Minitab, JMP), and technical reporting
- Proficiency in preparing technical documentation and delivering presentations
- Basic knowledge of semiconductor process equipment and materials
- Experience in key back-end processes such as TSV, RDL, and micro bump
- Knowledge of advanced packaging technologies including 2.5D, fan-out, and flip-chip
- Familiarity with related processes such as photo, chip attach, and underfill
- Proven experience in joint development projects with global customers
- Hands-on collaboration with material or equipment suppliers for co-evaluation or integration
- Expertise in process reliability testing (e.g., thermal cycling, HAST)
- Experience in process automation or smart fab environments
- Working proficiency in tools such as AutoCAD or ANSYS
- In-depth understanding of etch/strip conditions for back-end photoresist materials
- All Successful candidates can expect a very competitive remuneration package and a comprehensive range of benefits.
- Please email your resume in a detailed MS Word format to joyce@peopleprofilers.com stating
- 1) Current Drawn
- 2) Expecting Salary
- 3) Date Available
- 4) Reason to Leave each job:
- We regret that only shortlisted candidates will be notified
- Joyce Koh Ai Leng
- People Profilers Pte Ltd
- 20 Cecil St, #08-09, PLUS Building, Singapore 049705
- Tel: 6950 9737
- EA License Number: 02C4944
- EA Personnel Reg nos R1110618
- Job ID:
Full description
Summary
To lead the development, optimization, and stabilization of plating and etching processes for advanced semiconductor packaging, contributing to mass production readiness, yield improvement, and customer-specific technical solutions.
Job
Develop and optimize electroplating, seed etching, and PR stripping processes
Design and improve processes for TSV, RDL, Cu pillar, and micro bump formation
Evaluate and introduce new materials and equipment for plating/etching process integration
Conduct pre-production process validation and yield stabilization
Perform DOE planning and analyze experimental data using statistical tools (e.g., SPC, Minitab, JMP)
Develop customized processes and provide technical support for customer programs
Set up equipment and optimize operating conditions in coordination with vendors
Troubleshoot quality issues across plating and etching processes
Support development of advanced packaging technologies including 2.5D, fan-out, and SiP
Supports high-volume semiconductor packaging processes in plating and etching
Contributes directly to process yield, quality improvement, and customer technical satisfaction
Drives technical innovation in advanced packaging technologies in alignment with global customer programs
Requirement
Bachelor's degree or higher in Engineering or Science (e.g., Materials Science, Chemistry, Chemical Engineering, Electronics, Advanced Materials)
Minimum 3 years of hands-on experience in plating, etching, or stripping processes in semiconductor manufacturing
Fundamental understanding of advanced semiconductor fabrication and integration processes
Strong skills in experiment design, statistical data analysis (e.g., SPC, Minitab, JMP), and technical reporting
Proficiency in preparing technical documentation and delivering presentations
Basic knowledge of semiconductor process equipment and materials
Experience in key back-end processes such as TSV, RDL, and micro bump
Knowledge of advanced packaging technologies including 2.5D, fan-out, and flip-chip
Familiarity with related processes such as photo, chip attach, and underfill
Proven experience in joint development projects with global customers
Hands-on collaboration with material or equipment suppliers for co-evaluation or integration