Senior ASIC (Front-End) Design Engineer
Senior ASIC front-end design engineer at Ethernovia owning all aspects of digital SoC design — micro-architecture, RTL, verification, synthesis, CDC, LEC and STA — for advanced automotive Ethernet networking chips. Hybrid role in San Jose, working with architecture, software and verification teams to take high-performance custom silicon from spec to silicon.
- Compensation
- $200K–$300K / yr
- Location
- San Jose, CA
- Work setup
- Not specified
- Seniority
- Senior
- Employment
- Not specified
- Experience
- 10+ years
- Category
- Hardware
- Posted
Skills
Must have
- BS and/or MS in Electrical Engineering, Computer Science, or related field
- Minimum 10+ years of ASIC RTL design and/or architecture experience
- Proven track record with development of complex SoCs
- Strong understanding of digital design fundamentals and methodologies
- In-depth knowledge of Verilog/SystemVerilog and simulation tools
- Self-motivated and able to work effectively both independently and in a team
- Excellent communication/documentation skills
Nice to have
- Networking experience (Ethernet MAC, PHY, Switching, TCP/IP, security, PCIe and other industry standard protocols)
- Video standards, protocols, processing
- Digital signal processing filters
- IP integration (SerDes, controllers, processors, etc.)
- Perl, TCL, C/C++, Make
Full description
About Ethernovia, Inc.
Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018, the company’s breakthrough data transport and acceleration technology is ushering in a new era of connectivity and capabilities in the vehicle and at the edge, including highly reliable autonomy, over-the-air servicing and AI-backed applications.
Ethernovia's co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds’ leading technology investors, having secured $154M ($90+M Series-B and $64M Series-A) in total funding to date:
- Ethernovia Raises Over $90 Million Series B to Scale Leading-Edge Autonomy and Physical AI Networking Chips
- Ethernovia Raises $64 Million to Accelerate the Revolution of Vehicle Networks | Business Wire
- (financial backers include: Porsche SE, Qualcomm, AMD, Western Digital, Maverick Silicon, Socratic Partners, Conduit Capital, and CDIB-TEN Capital)
Ethernovia has been recognized in EE Times' prestigious list of the Top 100 Startups for 2025.
- March 2026: Ethernovia Announces HSB-Enabled Networking Board for NVIDIA Holoscan Platforms
- January 2024: Our CEO Ramin Shirani Named MotorTrend Software-Defined Vehicle Innovator Awards Winner (ethernovia.com)
- September 2023: Continental and Ethernovia Announce Partnership to Develop Automotive Switch in 7nm - Ethernovia
- Connected Car News: Helios, Continental, Ethernovia, Avanci, BMW, Mapbox, Porsche, SEMA, Honda, UltraSense, Flex Logix, Diodes Inc., Garmin, Toyota & Caruso | auto connected car news
With talented employees on 4 continents, we have filed 50+ patents to date.
Join Ethernovia’s team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles, robots and intelligent machines. Come share in our success with pre-IPO shares, competitive compensation, and great benefits while growing your knowledge and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive cutting edge designs from concept to silicon to the future of mobility.
Senior ASIC Front-End Design EngineerSummary:
- As a Senior ASIC Front-End Design Engineer, you will be responsible for all aspects of digital SoC design, from micro-architecture specification, RTL, verification, synthesis, lint, CDC, LEC, and static timing analysis to deliver a design meeting target power, performance, and area goals.