Senior ASIC Verification Design Automation Engineer

At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.

Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions.

We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.

We are hiring a Senior ASIC Verification Design Automation Engineer with strong design automation, AI based flow development, (agents, skills), scripting , infrastructure, and verification environment experience to support the development and execution of scalable ASIC verification flows for world-class SoCs used in high-performance computing, high-performance data analytics, and artificial intelligence interconnect solutions.

Key Responsibilities:

• Develop, maintain, and improve AI based flows for verification infrastructure, automation frameworks, and execution environments used across block, subsystem, and SoC-level ASIC verification

• Build and support scalable regression flows, dashboards, reporting utilities, and triage automation to improve verification productivity and visibility

• Create and enhance scripts, tools, and integrations using Python, Perl, Tcl, shell scripting, Make, and related automation technologies

• Support simulation, coverage, lint, formal, emulation, and continuous integration flows in collaboration with verification, design, architecture, and CAD teams

• Manage compute, storage, license, queue, and job-dispatch related infrastructure issues impacting verification execution and turnaround time

• Drive automation improvements that make verification environments more reliable, reproducible, debuggable, and efficient across geographically distributed teams