Senior ATE Test Engineer (f/m/d)
Black Semiconductor in Aachen is hiring a Senior ATE Test Engineer to own the bring-up and operation of its 300 mm wafer test infrastructure for electronic-photonic (graphene-based) chips. Day to day they set up and qualify ATE test cells, write and debug DC/RF/electro-optical test programs (Java/Python), drive probe card design with vendors, and analyze wafer-level data for pass/fail and yield as
- Compensation
- Not disclosed
- Location
- Aachen, Germany
- Work setup
- Hybrid
- Seniority
- Senior
- Employment
- Not specified
- Experience
- Not specified
- Category
- Qa
- Posted
Skills
Must have
- Master's degree or Ph.D. in Engineering, Physics, or a related technical discipline
- At least five years of hands-on experience setting up and operating ATE systems, including wafer probers and probe card specification, qualification, and integration
- Strong programming skills in Java and Python for test automation, instrument control, and automated data collection
- Hands-on experience performing electrical, optical, and electro-optical measurements on EIC and PIC devices
- Sound understanding of PIC and/or EIC device structures and operation, including EIC-to-PIC interface architectures
- Practical knowledge of design-for-test (DFT) methodologies and their implementation in integrated circuits
- Proven track record of transferring laboratory test methods and device characterization into production environments
- Proficiency in data processing, statistical analysis, and visualization using Python, Java, or LabVIEW, with experience applying SPC and monitoring yield, process performance, and reliability
- Knowledge of supplier management, incoming material characterization, and vendor qualification processes
Nice to have
- RF or high-speed testing experience
- Experience in a fast-paced startup or semiconductor manufacturing environment
- Advanced knowledge of optoelectronic device physics, graphene-based devices, and semiconductor operating principles
- Familiarity with photonic component qualification methodologies and industry reliability testing standards
- Experience characterizing and testing optoelectronic or semiconductor packaging
Full description
About us
We see the semiconductor industry as a realm of possibility. We see opportunity. We see the profound impact that our graphene solutions will have in transforming the industry. We invite you to join us in driving change with our fundamentally human-centered approach, uniting bright minds around a shared vision. The vision is: Prove to everybody that you can make a fundamental change. Prove with your knowledge and skills how things can be done differently. Together, we can change the paradigm of how the world connects
About our technology
The semiconductor industry’s growing demand for more powerful chips with higher bandwidth and lower power finds its solution in our technology. We connect chips to high-throughput, low-delay computing networks. The key lies in harnessing the physical properties of graphene to combine electronic computing with photonic communication, allowing countless chips to interact almost as if they were one. Our graphene photonic innovation increases computing power and efficiency to a new order of magnitude
In short, we connect chips to create powerful and energy-efficient networks, overcoming connectivity limitations in the semiconductor industry. We deliver the graphene solution
The Role
As a Senior Automated Test Equipment (ATE) Test Engineer, you will own the bring-up and operation of our high-volume 300 mm wafer test infrastructure for electronic-photonic integrated circuits. On a daily basis, you will set up and qualify ATE test cells, develop and debug test programs for DC, RF, and electro-optical device characterization, and drive probe card design with vendors. You will analyze wafer-level data to make pass/fail calls and share insights with design and process teams, helping us scale from engineering characterization to high-volume production.
To join our team, you should be excited to:
- Set up, qualify, and calibrate ATE test cells, ensuring readiness for high-volume wafer testing.
- Develop and debug automated test programs for DC, RF, optical, and electro-optical device characterization, including new measurement methods.
- Own probe card specifications, design, qualification, and integration, alongside associated interface hardware, in collaboration with vendors.
- Collaborate across teams to define comprehensive measurement plans and contribute to design-for-test (DFT) implementation.
- Collect, analyze, and report wafer-level measurement data to determine pass/fail outcomes and support yield monitoring, reliability testing, and failure analysis.
- Transfer laboratory characterization methods into production, developing automated test protocols and equipment specifications for manufacturing integration.