Senior Out-of-Order CPU Architect
Senior CPU architect at Intel defining end-to-end out-of-order CPU microarchitectures for high-performance and low-power products — specifying features and ISA instructions, running performance/power/area tradeoffs and simulations, and supporting RTL convergence in System Verilog. Core focus: wide rename/allocate, schedulers, and execution units in ARM/x86 pipelines.
- Compensation
- $190.6K–$361.5K / yr
- Location
- Austin, United States
- Work setup
- Onsite
- Seniority
- Senior
- Employment
- Full time
- Experience
- 2+ years
- Category
- Architecture
- Posted
Skills
Must have
- 15+ years in high-performance/high-frequency ARM or x86 CPU organizations in design or architecture
- 10+ years working on out-of-order CPU pipeline sections (rename/allocation, schedulers, execution units)
- 5+ years writing RTL and owning it through timing and power convergence across CPU generations
- 2+ years building deep, high-frequency advanced integer and/or floating-point/vector schedulers
- Expertise in CPU architecture fundamentals, microarchitecture design, low-power design, RTL development, System Verilog
- Ability to debug microarchitecture and simulation issues and solve complex design problems
- Ability to implement microarchitectural specifications in System Verilog when needed
Nice to have
- Strong analytical and problem-solving skills demonstrated through leadership roles or team management
- Effective collaboration skills to work across teams and influence cross-functional roadmaps
- Passion for driving innovation and contributing to Intel's mission
Full description
Job Details:
Job Description:
The Role and Impact
As a CPU Architect, you will be at the forefront of Intel's innovation, shaping the future of CPU designs for high-performance computing and low-power products. This role is integral to Intel's mission to deliver cutting-edge solutions that power the world's technology, from advanced data centers to everyday consumer devices. You will play a pivotal role in driving end-to-end CPU architecture specifications, ensuring optimal performance, power efficiency, scalability, and interoperability across hardware and software. Through creative problem-solving and collaboration, you will influence cross-functional roadmaps, define technology targets, and deliver revolutionary CPU architectures that meet diverse market requirements.
Key Responsibilities
- Develop and drive end-to-end CPU architecture specifications based on hardware features, requirements, and lifecycle needs.
- Define CPU targets for performance, power, frequency, area, and feature content to align with market requirements.
- Explore new approaches and devise novel architectures that deliver optimized CPUs for multiple segments, from high-performance computing to extreme low-power applications.
- Invent, conceptualize, and specify architectural and microarchitecture features that address future CPU usage and segment needs.
- Define and document new instructions to support innovative use cases and improve existing ones, enhancing the instruction set architecture (ISA).
- Develop and execute test plans and infrastructure for new architectures/features, simulate functional models, and analyze test results using advanced statistical techniques.
- Propose experimental changes and design alternatives to meet constraints for performance, power, area, and timing.
- Capable of, but not often required to in your role, of directly implementing your microarchitectural specifications in system verilog. If designers require aid in converging timing and/or power constraints, you are expected to be able to do the work yourself and solve the issues quickly.
- Review and influence cross-functional roadmaps and collaborate with architects, design, verification, and validation engineers during project execution.
- Drive definition of new microarchitectures and identify mitigations for issues during feature implementation to improve CPU designs.
- Expertise in CPU architecture fundamentals, microarchitecture design, low-power design, RTL development, and System Verilog.
- Proven ability to debug microarchitecture and simulation issues and solve complex design problems.
Qualifications:
Minimum Qualifications
- 15+ consecutive years of experience within high performance/high frequency ARM or x86 CPU organizations working in either the design or architectural domain. Ideally both.