Senior Physical Design Engineer - P&R
Senior ASIC physical design (place & route) engineer at BTA Design Services, fully remote from anywhere, working for a client building silicon for AI infrastructure. Owns backend implementation from netlist to GDSII on advanced FinFET nodes using Synopsys/Cadence flows: floorplanning, CTS, timing closure, ECOs, and IR-drop/power optimization.
- Compensation
- Not disclosed
- Location
- Canada
- Work setup
- Remote
- Seniority
- Senior
- Employment
- Contract
- Experience
- Not specified
- Category
- Hardware
- Posted
Skills
Must have
- 8+ years of relevant experience in ASIC digital place and route
- Recent hands-on experience with leading EDA tools and advanced flows (Synopsys and Cadence)
- Strong understanding of advanced FinFET technology nodes, DRC rules, and node-specific P&R requirements
- Practical experience with floorplanning
- Solid grasp of CTS concepts and ability to design clocks to meet timing requirements
- Working knowledge of IR-drop optimization strategies
- Experience with timing closure and ECO implementation
- Strong scripting skills
- Exposure to several of: synthesis, StarRC, PT DMSA, RedHawk, Calibre, and formal verification (LEC or Formality)
- Track record as a self-starter who works well within a team
- Strong written communication, self-direction, and discipline to deliver independently in a distributed remote team
Nice to have
- PT-ECO or Tweaker experience
Full description
About BTA Design Services
Headquartered in Ottawa, BTA Design Services supports the electronic design community across Canada and internationally, specializing in ASIC and FPGA design, verification, and embedded software development. We strengthen our clients' engineering teams and accelerate the delivery of complete, production ready designs.
We are adaptable, efficient, and built around exceptional technical talent. Our continued growth reflects the trust our clients place in us, and we are currently searching globally for a Senior Physical Design Engineer with deep expertise in place and route.
About the Engagement
You will join BTA Design Services as an employee and work on behalf of one of our clients, an industry leader building advanced silicon platforms for next generation AI infrastructure. The work pairs leading edge CMOS design with the bandwidth and power demands of modern AI, and the client partners with the world's foremost foundries to bring frontier designs to production. Further details are shared with candidates under confidentiality during the interview process.
This engagement places you at the center of that work, delivering world-class ASICs on the most demanding technology nodes in the industry.
About the Position
As a Senior Physical Design Engineer, you will own backend implementation from netlist to GDSII on challenging blocks and sub-systems. You will apply advanced flows and techniques on single-digit FinFET technology nodes, working alongside a strong and experienced team to bring complex designs to closure. This is a senior, fully remote role, and you may be located anywhere.
Key Responsibilities
- Run place and route implementation flows and analyze the results.
- Create effective floorplans that support physically aware synthesis.
- Drive designs to timing closure and run physical verification.
- Debug issues spanning tools, timing constraints, DFT, and design.
- Partner with the design team to improve RTL and make it implementation friendly.
- Implement and apply timing ECOs.
- Run PrimeTime and analyze timing reports.
- Develop strategies to optimize power and area.
- Run IR-drop analysis and identify optimal strategies to improve it.
- Interface with analog and front-end teams to align on shared objectives.
Key Qualifications
- 8 or more years of relevant experience in ASIC digital place and route.
- Recent, hands-on experience with leading EDA tools and advanced flows (Synopsys and Cadence).