Senior / Principal DRAM Product Development Engineer – DEG Technology

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

This role combines advanced DRAM circuit design with technology development, silicon learning, and yield improvement. We work across Design, Technology Development, Product Engineering, Test, Reliability, Quality, Manufacturing, and other teams to solve challenging memory-design problems and enable future technology generations

In this position, you will contribute to the design and optimization of critical DRAM circuitry, including Sense Amplifiers, timing distribution, calibration, and training features. You will influence designs from early process-node development through silicon bring-up and production ramp, using simulation, silicon data, statistical analysis, and automation to improve performance, robustness, yield, and manufacturability

Responsibilities:

• Design, analyze, verify, and optimize memory, logic, and analog circuits, including Sense Amplifiers, timing distribution, calibration, and training features
• Identify design marginalities and develop circuit- or architecture-level solutions that improve DRAM robustness, performance, scalability, and yield
• Support new process-node development, qualification, silicon bring-up, yield learning, and production ramp through modeling, simulation, silicon experiments, electrical failure analysis, and statistical analysis
• Guide layout, parasitic extraction, and modeling activities for Sense Amplifiers and Wordline drivers, including floor planning, placement, routing, signal-margin optimization, and memory-bit interaction
• Lead technical investigations and cross-functional initiatives, document methodologies and results, present findings to technical audiences, and mentor junior engineers

Minimum Qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics with an emphasis in semiconductor electronics, or an equivalent field
• 2–5 years of relevant experience for Senior-level candidates or 8+ years of relevant experience for Principal-level candidates
• Experience with DRAM, NAND, logic, or related interfaces
• Experience with circuit design, modeling, simulation, design verification, or silicon validation using relevant CAD tools

Preferred Qualifications:

• Master’s degree in Electrical Engineering, Computer Engineering, Physics with an emphasis in semiconductor electronics, or an equivalent field
• Deep understanding of high-speed I/O, signal and power integrity, power delivery networks, CMOS device physics, and BSIM modeling