Software Engineer, AI for Chip Design
Software engineer at OpenAI building the research infrastructure and tooling that lets AI models design silicon chips: creating reinforcement-learning and evaluation environments, integrating EDA tools for RTL generation/verification/physical design, and supporting researchers' experiments. Core tech includes Python, RL infrastructure, and chip-design (EDA) tooling.
- Compensation
- $266K–$468K / yr
- Location
- San Francisco
- Work setup
- Hybrid
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- Not specified
- Category
- Hardware
- Posted
Skills
Must have
- Strong software engineering fundamentals: designing, implementing, and debugging reliable systems
- Work across a stack, investigate unfamiliar failures, and make practical tradeoffs between speed, correctness, and maintainability
- Independently delivered substantial software projects and can explain technical decisions and their impact
- Comfortable working with researchers on evolving requirements and turning open-ended problems into working software
- Interested in learning how reinforcement learning and chip-design tools fit together
- Care about developing safe, beneficial AI
Nice to have
- Experience with research infrastructure, distributed systems, experiment orchestration, or ML tooling
- Familiarity with reinforcement learning, model evaluations, or training workflows
- Experience with Python, containerized tools, and reproducible development environments
- Experience with RTL, Verilog/SystemVerilog, EDA tools, formal verification, or chip-design automation
Full description
About the Team
OpenAI develops models that can reason through complex problems and hardware designed for the demands of advanced AI. AI for Chips connects these efforts: applying increasingly capable AI systems to the work of semiconductor engineering.
Our goal is to help engineers develop better chips and shorten design cycles. This work brings research, model training, and hardware expertise together to build tools that engineers can use on real designs, with correctness and measurable performance at the center.
About the Role
We’re hiring a Software Engineer to build the research infrastructure and tooling that help OpenAI models design silicon. You’ll turn chip-design workflows into reliable environments for reinforcement learning and evaluation, and make it easier for researchers to run experiments and iterate on new ideas.
You’ll move between software engineering, tool integration, and open research problems. We value strong coding fundamentals, clear technical judgment, and independent execution. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists.
In this role, you will:
- Build and maintain infrastructure for reinforcement learning environments, evaluations, and long-running experiments.
- Integrate electronic design automation (EDA) tools into workflows for RTL generation, verification, and physical design optimization.
- Improve experiment reliability, reproducibility, observability, and performance; debug failures across tools, services, and infrastructure.
- Develop tooling and model harnesses that let researchers test ideas quickly and measure correctness and power, performance, and area (PPA).
- Collaborate with researchers and engineers to turn successful experiments into reusable systems and training workflows.
- Own ambiguous projects end to end, communicate progress, and use results to guide the next iteration.
You might thrive in this role if you:
- Have strong software engineering fundamentals, with experience designing, implementing, and debugging reliable systems.
- Can work across a stack, investigate unfamiliar failures, and make practical tradeoffs between speed, correctness, and maintainability.
- Have independently delivered substantial software projects and can explain your technical decisions and their impact.
- Are comfortable working with researchers on evolving requirements and turning open-ended problems into working software.
- Are interested in learning how reinforcement learning and chip-design tools fit together.