Cadence
Solutions Engineer - AE
- Compensation
- Not disclosed
- Location
- No Seat Req United States
- Work setup
- Not specified
- Seniority
- Not specified
- Employment
- Not specified
- Experience
- 10+ years
- Category
- Solutions engineering
- Posted
Skills
Must have
- Bachelor’s degree (Masters preferred) in Electrical or Electronics Engineering, or related discipline with
- 10+ years of experience in semiconductor packaging, IC packaging, PCB, substrate, or interposer design.
- Strong knowledge of: Advanced package design methodologies 2.5D and 3D-IC integration Chiplet-based architectures Package manufacturing and assembly processes High-speed signal design Power delivery n
- Experience performing package layout, routing, constraint management, and package signoff.
- Solid understanding of package stackups, bump planning, escape routing, and substrate technologies.
- Excellent customer-facing communication and presentation skills.
- Ability to work independently while collaborating across global teams.
Nice to have
- Experience with Cadence Integrity 3D-IC Platform.
- Experience with Cadence Sigrity and Clarity 3D Solver.
- Hands-on experience with Cadence Allegro X APD.
- Knowledge of UCIe, HBM, AI accelerator packaging, and heterogeneous integration.
- Experience supporting foundry and OSAT design flows.
- Understanding of semiconductor assembly, reliability, and manufacturing processes.
Full description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Solutions Architect Engineer (AE)Advanced Packaging, 3D-IC and SI/PILocation
United States (Remote or Hybrid)
Job Summary
Cadence is seeking a highly motivated and experienced Solutions Application Engineer to support customers developing next-generation advanced packaging solutions, including 2.5D, 3D-IC, chiplet-based architectures, AI/HPC packages, and heterogeneous integration technologies.
The successful candidate will work directly with leading semiconductor companies, OSATs, foundries, and system companies to deploy and optimize Cadence Advanced Package 3D-IC associated design flows. This role combines technical expertise, customer engagement, solution development, and collaboration with R&D to drive customer success and product adoption.
Responsibilities
- Provide technical leadership and application support for Cadence 3D-IC design solutions.
- Assist customers with advanced package architecture, design implementation, and methodology development.
- Develop and demonstrate complete packaging workflows for:
- Organic substrates
- Silicon interposers
- Wafer Level Packaging
- 2.5D and 3D-IC integration
- Chiplet-based package architectures
- Support customer evaluations, proof-of-concepts, benchmarks, and production deployments.
- Deliver technical presentations, product demonstrations, workshops, and training sessions.
- Collaborate with sales teams to identify opportunities and provide technical pre-sales support.
- Work closely with R&D to communicate customer requirements, enhancement requests, and new technology needs.
- Support design-signoff methodologies including:
- DRC/LVS
- Connectivity verification
- Electrical rule checking
- Thermal analysis
- Signal Integrity (SI)
- Power Integrity (PI)
- Develop best practices, application notes, reference flows, and customer success methodologies.
- Assist in defining future product direction for advanced packaging, 3D-IC, and chiplet technologies.
Required Qualifications
- Bachelor’s degree (Masters preferred) in Electrical or Electronics Engineering, or related discipline with
- 10+ years of experience in semiconductor packaging, IC packaging, PCB, substrate, or interposer design.
- Strong knowledge of:
- Advanced package design methodologies
- 2.5D and 3D-IC integration
- Chiplet-based architectures
- Package manufacturing and assembly processes
- High-speed signal design