Sr. Staff Design Engineer

Team Credo is seeking a Sr. Staff Design Engineer to drive both hands-on digital ASIC design and strategic architecture direction for our High-Performance Network Interface IP portfolio. This role has direct impact on the interconnect infrastructure enabling next-generation AI and HPC systems. Depending on the candidate's strengths, the focus may span from leading RTL development and design execution to shaping product roadmaps, architecture requirements, and long-range technology investments.

The ideal candidate brings deep expertise in computing and communication systems -including memory subsystems, inter- and intra-chip interconnects, Ethernet, CXL, PCIe, UCIe, and UALink - and understands how these technologies support scalable AI infrastructure across accelerator, chiplet, and data center environments.

Base salary range is $144,000 - $228,000 a year. The base salary offer will depend on factors such as education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.

Why Credo

• Purpose: We invest in what matters. From meaningful-future shaping projects to competitive compensation, we empower you to grow your career while making a lasting impact.
• People: Connection starts within. We collaborate, celebrate wins, and create an environment where everyone can do their best work.
• Possibilities: Our belief shapes what’s next. Our technology powers the most reliable and energy-efficient connections around the world – and our team powers new products and markets that come next.

Responsibilities

• Lead technical evaluations of RFQs and guide functionality, power, performance, and area tradeoffs; partner with product marketing and key customers to define best-in-class technical solutions across product generations.
• Help define product and technology roadmaps based on customer needs, market direction, and technical trends; translate standards, constraints, and ecosystem trends into architecture goals, requirements, and engineering priorities.
• Own the scoping, planning, and execution tracking of design activities and product releases; guide architectural decisions with a focus on outcomes, scalability, product impact, and efficient implementation; create clear documentation, including functional specifications, architecture, microarchitecture, and product requirements.
• Develop, debug, and enhance RTL, running lint checks and simulation; perform synthesis tasks (timing constraints, logic synthesis, report analysis, timing closure, ECOs); partner with verification to shape test plans, review results, and drive root-cause analysis and resolution of failures; lead and contribute to design reviews for technical rigor and design quality.