STA Engineer - ASIC/SoC Design

Job Description:Total Experience : 4 - 10 years

Job Description :

• 4+ years of STA and timing closure experience on ASIC/SoC designs

• Strong expertise in Setup/Hold analysis, MMMC, OCV/AOCV/POCV, CRPR, SI, and timing signoff

• Hands-on experience with SDC constraints, timing exception validation, and ECO closure

• Proficiency in PrimeTime/Tempus and Tcl scripting

• Experience in subsystem/block-level timing signoff and advanced technology nodes

• Good understanding of CTS, extraction, IR-drop, crosstalk, low-power (UPF), and physical design impacts on timing